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CD4514BMS CD4515BMS
July 14, 2006
CMOS 4-Bit Latch/4-to-16 Line Decoders
Pinout
CD4514BMS, CD4515BMS TOP VIEW
STROBE 1 DATA 1 2 DATA 2 3 S7 4 S6 5 S5 6 S4 7 S3 8 S1 9 S2 10 S0 11 VSS 12 24 VDD 23 INHIBIT 22 DATA 4 21 DATA 3 20 S10 19 S11 18 S8 17 S9 16 S14 15 S15 14 S12 13 S13
Features
* High-Voltage Types (20-Volt Rating) * CD4514BMS Output "High" on Select * CD4515BMS Output "Low" on Select * Strobed Input Latch * Inhibit Control * 100% Tested for Quiescent Current at 20V * Maximum Input Current of 1A at 18V Over Full Package Temperature Range; 100nA at 18V and 25oC * Noise Margin (Full Package-Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V * 5V, 10V, and 15V Parametric Ratings * Standardized, Symmetrical Output Characteristics * Meets all Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices"
Functional Diagram
VDD = 24 VSS = 12 11 9 10 8 7 6 5 4 18 17 20 19 14 13 16 15 S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15
Applications
* Digital Multiplexing * Address Decoding * Hexadecimal/BCD Decoding * Program-counter Decoding * Control Decoder
DATA 1 2 DATA 2 3 DATA 3 21 DATA 4 22 STROBE 1
LATCH
A B C D
4 TO 16 DECODER
Description
CD4514BMS and CD4515BMS consist of a 4-bit strobed latch and a 4-to-16-line decoder. The latches hold the last input data presented prior to the strobe transition from 1 to 0. Inhibit control allows all outputs to be placed at 0(CD4514BMS) or 1(CD4515BMS) regardless of the state of the data or strobe inputs. The decode truth table indicates all combinations of data inputs and appropriate selected outputs. These devices are similar to industry types MC14514 and MC14515. The CD4514BMS and CD4515BMS are supplied in these 24 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4V H1Z H4P
INHIBIT
23
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright (c) Intersil Corporation 1999, 2006
FN3195.1
1
Specifications CD4514BMS, CD4515BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . 10mA Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 1/32 Inch (1.59mm 0.79mm) from case for 10s Maximum
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . . ja jc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K). . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Supply Current SYMBOL IDD CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH F VDD = 15V, No Load VDD = 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10A VSS = 0V, IDD = 10A VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V GROUP A SUBGROUPS 1 2 3 1 2 3 1 2 3 1, 2, 3 1, 2, 3 1 1 1 1 1 1 1 1 1 7 7 8A 8B 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 +25
oC,
LIMITS TEMPERATURE +25oC +125 C -55oC +25oC +125oC -55oC +25oC +125oC -55oC +125oC, +25oC +25oC +25
oC o
MIN -100 -1000 -100 -
MAX 10 1000 10 100 1000 100 50 -0.53 -1.8 -1.4 -3.5 -0.7 2.8
UNITS A A A nA nA nA nA nA nA mV V mA mA mA mA mA mA mA V V V
-55oC
0.53 1.4 3.5 -2.8 0.7
+25oC, +125oC, -55oC 14.95
+25oC +25oC +25oC +25 C +25oC +25oC +25oC +25 C +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC
o o
VOH > VOL < VDD/2 VDD/2
3.5 11
1.5 4 -
V V V V
NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs.
3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max.
2
Specifications CD4514BMS, CD4515BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 +25oC +125
oC,
LIMITS MIN MAX 970 1310 500 675 200 270 UNITS ns ns ns ns ns ns
PARAMETER Propagation Delay Strobe or Data Propagation Delay Inhibit Transition Time
SYMBOL TPHL1 TPLH1 TPHL2 TPLH2 TTHL TTLH
CONDITIONS (NOTE 1, 2) VDD = 5V, VIN = VDD or GND
-55oC -55oC
+25oC +125oC, +25oC +125oC, -55oC
NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND NOTES 1, 2 TEMPERATURE -55oC, +25oC +125 VDD = 10V, VIN = VDD or GND 1, 2
o oC o
MIN 4.95 9.95 0.36 0.64 0.9 1.6 2.4 4.2 +7
MAX 5 150 10 300 10 600 50 50 -0.36 -0.64 -1.15 -2.0 -0.9 -1.6 -2.4 -4.2 3 -
UNITS A A A A A A mV mV V V mA mA mA mA mA mA mA mA mA mA mA mA mA mA V V
-55 C, +25 C +125oC
oC,
VDD = 15V, VIN = VDD or GND
1, 2
-55
+25oC
o
+125 C Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) VOL VOL VOH VOH IOL5 VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, VOUT = 0.4V 1, 2 1, 2 1, 2 1, 2 1, 2 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55 C Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC -55 Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2
oC o o
+125 C -55oC +125oC -55
oC
Output Current (Source)
IOH5A
VDD = 5V, VOUT = 4.6V
1, 2
Output Current (Source)
IOH5B
VDD = 5V, VOUT = 2.5V
1, 2
+125oC -55
oC
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1, 2
+125oC -55 C
o oC
Output Current (Source)
IOH15
VDD =15V, VOUT = 13.5V
1, 2
+125
-55oC Input Voltage Low Input Voltage High VIL VIH VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V, VOH > 9V, VOL < 1V 1, 2 1, 2 +25oC, +125oC, -55oC +25oC, +125oC, -55oC
3
Specifications CD4514BMS, CD4515BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Propagation Delay Strobe or Datat Propagation Delay Inhibit Transition Time SYMBOL TPHL1 TPLH1 TPHL2 TPLH2 TTHL TTLH TS CONDITIONS VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V Minimum Strobe Pulse Width TW VDD = 5V VDD = 10V VDD = 15V Input Capacitance NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. CIN Any Input NOTES 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2 TEMPERATURE +25oC +25 C +25oC +25 C +25 C +25oC +25 C +25 C +25oC +25 C +25oC +25 +25
oC oC o o o o o o
MIN -
MAX 370 270 220 170 100 80 150 70 40 250 100 75 7.5
UNITS ns ns ns ns ns ns ns ns ns ns ns ns pF
Minimum Data Setup Time
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage N Threshold Voltage Delta P Threshold Voltage P Threshold Voltage Delta Functional SYMBOL IDD VNTH VTN VTP VTP F CONDITIONS VDD = 20V, VIN = VDD or GND VDD = 10V, ISS = -10A VDD = 10V, ISS = -10A VSS = 0V, IDD = 10A VSS = 0V, IDD = 10A VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 1, 2, 3, 4 +25oC NOTES 1, 4 1, 4 1, 4 1, 4 1, 4 1 TEMPERATURE +25 C +25 C +25 C +25oC +25
oC o o o
MIN -2.8 0.2 VOH > VDD/2 -
MAX 25 -0.2 1 2.8 1 VOL < VDD/2 1.35 x +25oC Limit
UNITS A V V V V V
+25oC
ns
NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25oC limit. 4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC PARAMETER Supply Current - MSI-2 Output Current (Sink) Output Current (Source) SYMBOL IDD IOL5 IOH5A 1.0A 20% x Pre-Test Reading 20% x Pre-Test Reading DELTA LIMIT
4
Specifications CD4514BMS, CD4515BMS
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test 1 (Post Burn-In) Interim Test 2 (Post Burn-In) PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A Group B Subgroup B-5 Subgroup B-6 Group D MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 Subgroups 1, 2, 3, 9, 10, 11 IDD, IOL5, IOH5A READ AND RECORD IDD, IOL5, IOH5A IDD, IOL5, IOH5A IDD, IOL5, IOH5A
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1, 7, 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1, 9 POST-IRRAD Table 4
CONFORMANCE GROUPS Group E Subgroup 2
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In 1 (Note 1) Static Burn-In 2 (Note 1) Dynamic BurnIn (Note 1) Irradiation (Note 2) NOTES: 1. Each pin except VDD and GND will have a series resistor of 10K 5%, VDD = 18V 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V 0.5V OPEN 4-11, 13-20 4-11, 13-20 GROUND 1-3, 12, 21-23 12 2, 3, 12 VDD 24 1-3, 21-24 21, 22, 24 4-11, 13-20 1 23 9V -0.5V 50kHz 25kHz
5
CD4514BMS, CD4515BMS Logic Diagram
VDD ABCD ABCD ABCD VSS ABCD ABCD S R DATA 2 3 Q Q Q Q Q Q Q Q ABCD D C B A ABCD ABCD ABCD ABCD ABCD ABCD ABCD ABCD R 11 S0 9 S1
10 S2 8 7 6 5 4 S3 S4 S5 S6 S7
DATA 1 2
*
*
S R
DATA 3 21
*
S R
18 S8 17 S9 20 S10 19 S11 14 S12 13 S13 16 S14 15 S15
DATA 4 22
*
S
STROBE
1
* *
INHIBIT 23
ABCD ABCD
* All inputs protected by CMOS protection network.
THESE INVENTERS USED ONLY ON CD4515BMS
FIGURE 1. LOGIC DIAGRAM TRUTH TABLE DECODER INPUTS INHIBIT 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 = HIGH LEVEL D 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 X C 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 X B 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 X A 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X SELECTED OUTPUT CD4514BMS = LOGIC 1 (HIGH) CD4515BMS = LOGIC 0 (LOW) S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 All Outputs = 0, CD4514BMS All Outputs = 1, CD4515BMS X = DON'T CARE
0 = LOW LEVEL
6
CD4514BMS, CD4515BMS Typical Performance Characteristics
OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC
30 25 20 15 10 5 0
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
15.0 12.5 10.0 7.5 5.0 2.5 0 5 5V 10 15 10V GATE-TO-SOURCE VOLTAGE (VGS) = 15V
10V
5V 5 10 15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V
FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5 0
0
0 -5 -10 -15
0 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) 100
-10V
-20 -25
-10V
-10
-15V
-30
-15V
-15
FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
STROBE OR DATA PROPAGATION DELAY TIME (tPHL, tPLH) - ns 550 500 450 400 350 300 250 200 150 100 50 0 10V 15V 20 40 60 80 LOAD CAPACITANCE (CL) (pF) 100 AMBIENT TEMPERATURE (TA) = +25oC SUPPLY VOLTAGE (VDD) = 5V
FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
INHIBIT PROPAGATION DELAY TIME (tPHL, tPLH) - ns AMBIENT TEMPERATURE (TA) = +25oC 350 300 250 200 150 100 50 0 10V 15V SUPPLY VOLTAGE (VDD) = 5V
20
40 60 80 LOAD CAPACITANCE (CL) (pF)
FIGURE 6. TYPICAL STROBE OR DATA PROPAGATION DELAY TIME vs LOAD CAPACITANCE
FIGURE 7. TYPICAL INHIBIT PROPAGATION DELAY TIME vs LOAD CAPACITANCE
7
CD4514BMS, CD4515BMS Typical Performance Characteristics
AMBIENT TEMPERATURE (TA) = +25oC TRANSITION TIME (fTHL, fTLH) (ns)
(Continued)
STROBE OR DATA PROPAGATION DELAY TIME (tPLH, tPHL) - ns)
AMBIENT TEMPERATURE (TA) = +25oC LOAD CAPACITANCE (CL) = 50pF 500
200 SUPPLY VOLTAGE (VDD) = 5V
400
150
300
100 10V 50 15V
200
100 0 0
0 0
20
40 60 80 100 LOAD CAPACITANCE (CL) (pF)
5
10 15 20 LOAD CAPACITANCE (CL) (pF)
25
FIGURE 8. TYPICAL LOW-TO-HIGH TRANSITION TIME vs LOAD CAPACITANCE
106 105
POWER DISSIPATION (PD) - W
FIGURE 9. TYPICAL STROBE OR DATA PROPAGATION DELAY TIME vs SUPPLY VOLTAGE
AMBIENT TEMPERATURE (TA) = +25oC SUPPLY VOLTAGE (VDD) = 15V 10V 5V 10V
104 103 102 10
CL = 50pF CL = 15pF
2 4 68
1
101 102 FREQUENCY (f) (kHz)
2
4
68
2
4
68
103
2
4 68
104
10. TYPICAL POWER DISSIPATION vs FREQUENCY
Waveforms
DATA
50% tS
tr, tf = 20ns
STROBE
50% tW
FIGURE 11. WAVEFORMS FOR SETUP TIME AND STROBE PULSE WIDTH
8
CD4514BMS, CD4515BMS Chip Dimensions and Pad Layouts
0 74 70 60 50 40 30 20 10 0 4-10 (0.102-0.254) 71-79 (1.804-2.006) 10 20 30 40 50 60 70 80 90 100 110 112
109-117 (2.769-2.971)
Dimensions in parentheses are in milimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch.)
METALLIZATION: Thickness: 11kA - 14kA, PASSIVATION: 10.4kA - 15.6kA, Silane
AL.
BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
9

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